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Hypura – A storage-tier-aware LLM inference scheduler for Apple Silicon

github.com

221 points by tatef 3 months ago · 100 comments

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simonw 3 months ago

Suggestion for the maintainers: the comparison table currently lists some pretty old models, Qwen 2.5 14B and Mixtral 8x7B and Llama 3.3 70B.

A lot of people are reporting incredible results with the Qwen 3.5 MoE models on Apple hardware right now (streaming experts - see https://simonwillison.net/2026/Mar/24/streaming-experts/) - it would be great to get some of those models into that table.

Maybe the 1T parameter Kimi K2.5 too if you can get that to work, see https://twitter.com/seikixtc/status/2036246162936910322 and https://twitter.com/danpacary/status/2036480556045836603

  • Imustaskforhelp 3 months ago

    Simon, A little offtopic but it seems that your website isn't working.

    > An error occurred in the application and your page could not be served. If you are the application owner, check your logs for details. You can do this from the Heroku CLI with the command

    I get this error when I go to simonwillison.net

    Any random blog/link works for example though: https://simonwillison.net/2026/Mar/19/openai-acquiring-astra...

    (I checked your website because I wanted to see if you had written something about trivy/litellm as well, I highly recommend checking out what has happened within litellm space if possible as I would love to read your thoughts on it)

    Have a nice day simon!

    Edit: now the website works but I am not sure what had gone wrong previously, (an issue from heroku maybe?) as its working now

    Edit-2: after the website working, I am able to see that you have already made a post about it.

  • tatefOP 3 months ago

    Thanks for sharing this! If you'd be interested in running the benchmark yourself with Hypura I'd happily merge into our stats. Otherwise will add to my todo list :)

  • abtinf 3 months ago

    The lack of a token rate metric for the kimi example is disappointing.

    • zozbot234 3 months ago

      The latter link says they get ~1.7 tok/s which is quite impressive for a near-SOTA local model running on ordinary hardware.

vanyaland 3 months ago

For a lot of local workloads, sub-1 tok/s is useless in foreground and perfectly acceptable in background. If the choice is “this crashes” vs “this finishes overnight,” that’s still a meaningful capability jump.

  • joelthelion 3 months ago

    How much are you going to spend on electricity though? Is this really going to be more cost-effective than just using openrouter?

    • austinthetaco 3 months ago

      There are many other reasons someone might want to run a model locally outside of cost savings, ownership of data flow and use in locations without internet to name a couple.

    • hadlock 3 months ago

      If my options are run Opus 4.6 in the cloud for $200/mo or run Opus 4.6 locally for $275, I am absolutely going to self-host 100% of the time. Sending all that data to the cloud presents tremendous legal risk for companies. There's currently no retention rules about privately hosted AI.

marksully 3 months ago

Where does "1T parameter model" come from? I can only see models with 70B params or less mentioned in the repo.

  • tatefOP 3 months ago

    I'm referencing it as being possible, however I didn't share benchmarks because candidly the performance would be so slow it would only be useful for very specific tasks over long time horizons. The more practical use cases are less flashy but capable of achieving multiple tokens/sec (ie smaller MoE models where not all experts need to be loaded in memory simultaneously)

  • causal 3 months ago

    Yeah title comes from nowhere in the link. No doubt it's possible but all that matters is speed and we learn nothing of that here...

baq 3 months ago

Intel Optane rolling in its grave.

  • aitchnyu 3 months ago

    Memristors are also missing in this AI hype even when they were around the corner 10 years back.

  • moffkalast 3 months ago

    Wouldn't be Intel if they didn't quit halfway through on a good thing.

    Still, couldn't one get a RAID 0 card with four drives to saturate a 16x lane? That's already the max one could push through PCIe anyhow.

  • liuliu 3 months ago

    Still have 4 brand new ones in my storage unit. Just in case these moments.

    Joke aside (I do have them tho!), I don't think Optane is that much use (not to mention it is only 256GiB for my unit). It is useful legacy crutch if you have legacy software that is not designed to issue multiple reads / writes in parallel. If you do, it is really not faster than NVMe, especially these modern ones.

    • zozbot234 3 months ago

      It's not about being faster (except for small reads where latency dominates, which is actually relevant when reading a handful of expert-layers immediately after routing), it's the wearout resistance which opens up the possibility of storing KV-cache (including the "linear" KV-cache of recent Qwen, which is not append-only as it was with the pure attention model) and maybe even per-layer activations - though this has the least use given how ephemeral these are.

  • speedgoose 3 months ago

    Is it too late for Intel to bring them back to life?

    • c0balt 3 months ago

      Yes, their NAND division has been sold, it is now mostly under solidigm. Maybe solidigm could bring it back, but it seems unlikely (given the previous commercial failure).

    • walterbell 3 months ago

      Nvidia and SK Hynix are bringing HBF to market for $$.

  • 0ptan3 3 months ago

    pmem

shubhamintech 3 months ago

The MoE point matters here ie sparse activation means you're not reading all 2TB per forward pass, but the access pattern flips from sequential to random which is exactly the worst case for NVMe. Been thinking about this a lot for agent inference workloads where you want consistent latency more than peak throughput.

Insanity 3 months ago

This is a pretty cool project! Essentially this is like using Swap memory to extend your RAM, but in a 'smart' way so you don't overload the NVMe unnecessarily.

I do wonder in practice how the 'smarts' pan out, because putting a ton of stress on your NVMe during generation is probably not the best choice for it's longevity.

  • zozbot234 3 months ago

    This is not putting any stress or wear on the NVMe, it's a pure read workload.

  • embedding-shape 3 months ago

    > but in a 'smart' way so you don't overload the NVMe unnecessarily

    "overloading NVMe"? What is that about? First time I've heard anything about it.

    > because putting a ton of stress on your NVMe during generation

    Really shouldn't "stress your NVMe", something is severely wrong if that's happening. I've been hammering my SSDs forever, and while write operations "hurt" the longevity of the flash cells themselves, the controller interface really shouldn't be affected by this at all, unless I'm missing something here.

    • tatefOP 3 months ago

      Hypura reads tensor weights from the GGUF file on NVMe into RAM/GPU memory pools, then compute happens entirely in RAM/GPU.

      There is no writing to SSDs on inference with this architecture.

      • embedding-shape 3 months ago

        Even if there was a ton of writing, I'm not sure where NVMe even comes in the picture, write durability is about the flash cells on SSDs, nothing to do with the interface, someone correct me if I'm wrong.

    • Insanity 3 months ago

      I had assumed heat generation on the controller if it's continuously reading. But maybe it's not actually bad.

msbhogavi 3 months ago

"As much memory as possible" is right for model capacity but misses bandwidth. Apple Silicon has distinct tiers: M4 Pro at 273 GB/s, M4 Max at 546 GB/s, M4 Ultra at 819 GB/s. Bandwidth determines tok/s once the model fits in memory. An M4 Max gives you 2x the decode speed of an M4 Pro on the same model.

For what Hypura does, the Max is the sweet spot. 64GB loads a 70B at Q4 with room to spare, and double the bandwidth of the Pro means generation is actually usable instead of just technically possible.

zozbot234 3 months ago

It will be interesting to compare this to https://news.ycombinator.com/item?id=47476422 and https://news.ycombinator.com/item?id=47490070 . Very similar design except that this is apparently using mmap, which according to the earlier experiment incurs significant overhead.

astrange 3 months ago

> Consumer hardware (MacBook Pro, Mac Studio) ships with fast unified memory and NVMe storage, but limited capacity. A 32 GB M1 Max cannot naively load a 40 GB model — the OS will swap-thrash until the OOM killer intervenes.

macOS doesn't have an "OOM killer" in that sense. (It has an out of swap space killer but it's pretty weak.)

So what will happen is, either your memory wiring will fail, or else it will get really slow and panic.

dev_tools_lab 3 months ago

Nice work on the scheduler. Have you benchmarked parallel inference across multiple models? Running GPT, Claude and Gemini simultaneously on the same input is where latency becomes a real constraint.

  • zozbot234 3 months ago

    GPT-OSS exists but Claude and Gemini aren't available locally, lol.

    • dev_tools_lab 3 months ago

      True, Claude and Gemini aren’t local yet — I mostly meant running all available local models in parallel.

      Even with just open-source LLMs, you can see interesting differences in flagged issues when cross-validating outputs.

dev_tools_lab 3 months ago

Thanks for this project. Prioritizing MoE models and adding an intelligent NVMe cache could improve efficiency, especially on the M4 Max where bandwidth makes usage more realistic.

EnPissant 3 months ago

You do not provide any comparison to llama.cpp with mmap.

You do not explain how any kind of predictor can work for MoE experts.

You do not explain how prediction can even be useful. I can predict the layers used in a dense model (all of them are used in order), but that doesn't help me much. It's still bottlenecked on bandwidth (hint: MoE doesn't change this).

root_axis 3 months ago

Are there any 1T parameter open source models?

dangoodmanUT 3 months ago

With unified memory and such a strong os-hardware integration, one would hope that swap could handle this task

nullbyte 3 months ago

I am curious how the TPS compares vs default OS virtual memory paging

speedgoose 3 months ago

I wonder how many minutes per token on GLM 5.

amelius 3 months ago

This is <1 tok/s for the 40GB model.

Come on, "Run" is not the right word. "Crawl" is.

Headlines like that are misleading.

  • feznyng 3 months ago

    Could still be useful; maybe for overnight async workloads? Tell your agent research xyz at night and wake up to a report.

    • maleldil 3 months ago

      Assuming 1 token per second and "overnight" being 12 hours, that's 43 200 tokens. I'm not sure what you can meaningfully achieve with that.

      • zozbot234 3 months ago

        Sure, but if long-term throughput is a real limitation there's plenty of ways to address that while still not needing to keep anywhere close to all model weights in RAM (which is still the conventional approach with MoE). So the gain of a smaller memory footprint is quite real.

  • smlacy 3 months ago

    Yes, and with virtually zero context, which makes an enormous difference for TTFT on the MoE models.

monksy 3 months ago

There needs to be something like this from Ollama. At the moment Ollama has a lot of flaws that prevent it from getting great performance. (My understanding is better GPU/CPU splits, etc). But Ollama is the only way to host an LLM and have it switch out on demand. Sigh.

solozaki 3 months ago

hello

anshulbasia27 3 months ago

OS paging would be significantly worse here. The kernel's page fault handler is reactive — it doesn't know you're about to read layer 47's FFN weights, so it can't prefetch. You stall on every fault, wait for the 4KB/16KB page to load, then resume. With 80 layers of dense FFN streaming, that's thousands of cold faults per token.

  What makes this approach faster is that the model's access pattern is completely deterministic during         
  inference. You know exactly which tensors are needed next because transformer layers execute sequentially. So
  you can issue large sequential reads and prefetch the next layer while the current one is computing on Metal. 
  The OS page cache can't do that — it has no concept of "layer N+1 comes after layer N."

  For MoE it's even more stark. The OS would page in all 8 experts on the first token that routes to each one,  
  then evict them under memory pressure with LRU, which has no idea that expert 3 fires 10x more often than
  expert 7. The neuron cache here is basically a domain-specific replacement policy.
  • zozbot234 3 months ago

    > The kernel's page fault handler is reactive — it doesn't know you're about to read layer 47's FFN weights, so it can't prefetch.

    man 2 madvise

    • astrange 3 months ago

      That works for readahead but it's not good for random access. readv, aio, dispatch_io are better there.

      • zozbot234 3 months ago

        This claim is a bit apples and oranges (no pun intended!). madvise is all about providing hints to the kernel to tune the page cache and readahead (including possibly disabling readahead altogether). it's not about performing reads into private memory buffers, which is actually where the options you mentioned fit in.

        • astrange 3 months ago

          Triggering reads is also how you get pages into the page cache, so it helps to know how to do it.

  • EnPissant 3 months ago

    That assumes you have significant work to do between fetches (so you can prefetch while using the current data). With LLM decode you don't.

erikcw 3 months ago

Simon Willison wrote a good post about Dan Woods’ work on “Autoresearching Apple's "LLM in a Flash" to run Qwen 397B locally”.

[0] https://simonwillison.net/2026/Mar/18/llm-in-a-flash/

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