Chinese memory giant CXMT has reportedly begun risk production of HBM3E memory, according to The Information. This indicates that Chinese memory manufacturers are currently two generations behind South Korean companies, which are gradually transitioning to HBM4E memory production. However, this is a significant milestone for CXMT, which is on track to achieve a manufacturing capacity of around 350,000 DRAM wafers per month by the end of the year, with plans to increase that capacity in the coming years. It is reported that HBM3E manufacturing has started in very low quantities, signifying the commencement of risk production.
While we don't know the specifications of CXMT's HBM3E memory, we know that the standard JEDEC specification states that this must be a 1,024-bit width, and speeds of anywhere from 9.2 Gbps per pin to 12.4 Gbps, with most of the standard configurations targeting 9.6 Gbps per pin. The total bandwidth is around 1.2 TB/s, and capacities come in anywhere from 24 GB using 8-hi stacks or 36 GB using 12-high stacks of 24 Gb layers. However, given that CXMT progresses rapidly from risk production to mass production, we could see high volume manufacturing take place in just a few weeks.
Additionally, CXMT excels in cleanroom construction time, taking only 12 months to build its fab's cleanroom compared to the two years typically required by others. CXMT operates several facilities, including two 12-inch fabs, one in Hefei and one in Beijing, each with an output of about 100,000 wafers per month. This results in a current output capacity of around 200,000 wafers per month, with plans to triple that number to an impressive 600,000 wafers per month when the Shanghai and Hefei plants are completed and fully operational in the future. How much of that capacity will be dedicated to HBM memory is unclear, but HBM memory requires multiple DRAM dies for a single stack, meaning regular DRAM may not become more accessible if HBM demand continues to grow.